1. Field of the Invention
The present invention generally relates to computer systems, and in particular, to handling of memory access operations.
2. Description of the Related Art
To facilitate memory access operations, a translation-lookaside buffer (TLB) is employed by microprocessors to provide the translation of linear addresses to physical addresses. The TLB caches linear addresses and corresponding physical addresses. In use, the TLB is initially accessed to determine whether the TLB contains the physical address corresponding to a linear address identifying a desired memory location. If the linear address is found within the TLB, a xe2x80x9chitxe2x80x9d is said to have occurred, and the physical address is merely loaded out of the TLB. If the linear and physical addresses are not cached within the TLB, then a TLB xe2x80x9cmissxe2x80x9d is said to have occurred. In which case, a page miss handler (PMH) is used to perform a page table walk to determine the physical address corresponding to the desired linear address.
At least in some of the existing microprocessors, if a TLB xe2x80x9cmissxe2x80x9d occurs on a prefetch, the prefetch operation causing the TLB xe2x80x9cmissxe2x80x9d is automatically dropped from the execution pipeline because of difficulties and complexities associated with managing faults in connection with speculative memory access operations. Consequently, when a TLB xe2x80x9cmissxe2x80x9d is detected on a prefetch operation, the prefetch operation is aborted from the system and corresponding page table walk is not performed.
Faults represent circumstances where normal processing of the memory access to physical address cannot be properly processed. A wide variety of faults are commonly known. Examples include page and protection faults. In a page fault, the physical address identifies a page not presently held in the main memory, which must be read from the hard disk. A protection fault indicates that the physical address identifies a portion of memory for which the currently executing process does not have the privilege to access because, for example, the current process is a user program and the memory identified by the physical address corresponds to operating system (xe2x80x9cOSxe2x80x9d) memory.